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Caller ID Generator (Japan) DSP C Code

Description: implements Caller IDentity - CID - generation for communicating call data on-hook over telephone lines to subscribers as implemented in Japan. Here before the 1st normal ring, the exchange sends a line reversal followed by a set of short rings that should be inaudible in a normal subscriber phone. The phone responds by going off-hook, triggering the exchange to send the CID message data. After reception, the phone reverts to on-hook, and the exchange continues with normal ringing.
         The CID message is a pre-amble of mark carrier followed by the message byte data and finally a cyclic redundancy check (CRC) byte-pair, all modulated as a V.23 modem signal. The byte data consists of multiple parameter groups. The CID Generator - Encoder+Transmitter - implements the message data communication for the exchange end. The software function summary is:

CID Encoder - sequences the pre-amble of mark carrier signal for a user-set period, followed by the fixed start 5 bytes, then bytes from the message data buffer adding parity, then the fixed end 2 bytes, and finally the formed CRC byte-pair

The Encoder generates line signal samples using the following routine, available on its own:

CID Transmitter (as used with "standard" CID) - accepts pre-amble or message data bytes adding start/stop bits then, with per-sample timing for 1200b/s, frequency-modulates at V.23 (1300Hz Mark, 2100Hz Space) to generate each transmit sample

The Generator requires a buffer of the complete message data to be pre-loaded at the user interface in parameterised byte form, excluding the CRC bytes. Message parameterisation in the user code gives flexibility in dealing with Caller ID categories. The message buffer format is 2 per 16-bit word for efficiency in multi-channel use.
The C code is suitable for any processor with an ANSI-compliant C compiler. It is designed especially for efficient operation on low-cost fixed-point DSP- and general-purpose micro-processors. All data memory is specified as 16-bit integer words. Multiplies are integer 16x16-bit with 32-bit products. Sample rates of 8.0kHz and 9.6kHz can be selected. Each function has an initialisation call and a per-sample main routine call, and is re-entrant with memory offset-addressing for multi-channel operation. A comprehensive user's guide is provided with the code.

Processor Load:

Function MIPS# Data memory (words) Prog memory (bytes)#
CID-J Generator (Encoder+Transmitter) 0.9 4 + (6 + M) x N 0.6k
CID Transmitter only 0.5 4 x N 0.2k

- #example figures from compiling for the TI TMS320C5000(C55x) DSP processor at 8.0kHz sampling
in data memory figures M is the user-set buffer size at 2 bytes per word and N is no. of channels

Availability: NOW - sale is under licence - integration support offered

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