Speech Coder DSP C Code
the ITU G.726 coder is intended for telephone quality speech signals.
The sample rate is 8kHz and the compression is to data rates of (selectably)
16, 24, 32, or 40kb/s. Applications include circuit multiplication, digital
telephony, and speech storage. The algorithm uses Adaptive Differential
Pulse Code Modulation (ADPCM) in a backwards configuration. Throughput
delay is minimal, the encoder output being a code adaptively quantised
from the current input sample and the coder memory.
Speech conveyed at 40kb/s G.726
is near identical to 64kb/s PCM (G.711) whilst G.726 32kb/s is only marginally
lower than 64kb/s PCM in signal quality. Speech quality at G.726 24kb/s
and 16kb/s is increasingly impaired, being intended for overload channels
in circuit multiplication. As inherently a waveform coder, and having
also adaptive quantisation for non-voice signals, G.726 at 32 or 40kb/s
can pass standard DTMF signalling and low-speed modem signals up to 2400b/s.
G.726 at 40kb/s can convey modem signals eg fax to 12,000b/s.
The C code is suitable for any
processor with an ANSI-compliant C compiler. It is designed especially
for efficient operation on low-cost fixed-point DSP- and general-purpose
micro-processors. All data memory is specified as 16-bit integer words.
Multiplies are integer 16x16-bit with 32-bit products.
The G.726 software operates in
3 sample-coding modes. In linear mode, the encoder inputs and the decoder
outputs 14-bit samples. In PCM mode, the samples are in 8-bit G.711 PCM
codes, either A-law or -law. In PCM+SCA mode, the PCM samples at the output
of the decoder have synchronous coding adjustment (SCA) applied to prevent
cumulative distortion occurring on synchronous tandem connections (ADPCM-PCM-ADPCM,
The Algotron implementation has
been developed to have low processor resource usage whilst still passing
the G.726 test vectors. Encoder and decoder are operated as separate items,
each having individual per-sample/ADPCM-code subroutine calls. Further
subroutine calls can be made for initialisation and/or for changing the
data rate and sample-coding mode. The code routine calls are re-entrant
to allow multi-channel operation. A comprehensive user's guide is provided
with the code.
figures for encoder+decoder
- #example figures from compiling for the TI TMS320C5000(C55x) DSP processor
- for encoder- or decoder-only implementation, the MIPS count and data
memory / channel are
halved, and the program memory is reduced by 0.4kbytes for encoder, 0.15kbytes
NOW - sale is under licence - integration support offered